A Fast Approximate Function Generation Method to ATMR Architecture

Abstract

Transistor miniaturization produces circuits with higher transistor density, allowing the development of more complex circuits. On the other hand, the circuit susceptibility to faults is increasing. The Triple Modular Redundancy with a majority voter presents a 100% fault coverage for single faults in the modules, but it has more than 200% of area overhead. Approximate computing is used to create Approximate Triple Modular Redundancy (ATMR) modules, reducing area overhead. This work proposes a fast method to obtain approximate modules for an ATMR architecture. This is done using variables with the highest correlation with the output to create approximate solutions. The generated ATMRs have in the best case an area overhead of 86% and an error rate of 3.6%. Our method generates ATMR functions 7 orders of magnitude faster on average when compared to [1]. Therefore, the proposed method presents higher scalability capable of embracing higher complex-ity designs. The low computational cost of finding the solutions is key to turning feasible using ATMR in complex designs.