Compiler-assisted leakage energy optimization of media applications on stream architectures

Shan Cao, Zhaolin Li, Z. Chen, Guoyue Jiang, Shaojun Wei
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Abstract

Stream architecture is emerging as an important architecture for performance improvement of media applications. With technology scaled to nanometer-scale, leakage energy consumption is accounting for a greater proportion of the total energy consumption than ever, especially for stream architectures with a large number of functional units. In this paper, a compiler-assisted instruction-level scheduling algorithm is proposed to optimize leakage energy by idle interval distribution for stream architectures. The algorithm explores the scheduling spaces of idle intervals spatially and temporally and gathers the idle intervals for power-gating. The leakage energy is optimized without performance loss by increasing efficient power-gated cycles and decreasing switch times. We implement the proposed scheduling algorithm on Imagine processor and employ a set of benchmarks to evaluate the effectiveness of the algorithm. Experimental results show that the leakage energy consumption is reduced by 52% averagely compared with the list scheduling algorithm.
流架构媒体应用的编译器辅助泄漏能量优化
流架构正在成为媒体应用程序性能改进的重要架构。随着技术规模扩展到纳米尺度,泄漏能耗占总能耗的比例比以往任何时候都要大,特别是对于具有大量功能单元的流架构。本文提出了一种编译器辅助指令级调度算法,通过空闲间隔分配优化流架构的泄漏能量。该算法从空间和时间上探索空闲区间的调度空间,并对空闲区间进行集合进行功率门控。通过增加有效的功率门控周期和减少开关次数,优化了泄漏能量,而没有性能损失。我们在Imagine处理器上实现了所提出的调度算法,并采用一组基准测试来评估算法的有效性。实验结果表明,与列表调度算法相比,该算法的泄漏能耗平均降低52%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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