An Acceleration and Optimization Method for Optical Reconfiguration

Minoru Watanabe, N. Yamaguchi
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Abstract

Optically reconfigurable gate arrays (ORGAs), by exploiting the large storage capacity of holographic memory, offer the possibility of providing a virtual gate count that is much larger than those of currently available VLSI circuits. Because circuits implemented on a gate array must often be changed using virtual circuits stored in a holographic memory, rapid reconfiguration is necessary to reduce the reconfiguration overhead. A simple means to realize a short reconfiguration time in ORGAs is to implement a high-power laser array. However, such an array presents the disadvantages of high power consumption, large implementation space, high cost, and so on. Therefore, this paper presents an acceleration method to increase ORGAs' reconfiguration frequency without the necessity for any increase of laser power. This technique also includes optimization between the number of reconfiguration contexts and the reconfiguration frequency. The description in this paper clarifies the advantages using simulation and experimental results.
一种光学重构加速优化方法
光学可重构门阵列(ORGAs)通过利用全息存储器的大存储容量,提供了提供比当前可用的VLSI电路大得多的虚拟门计数的可能性。由于在门阵列上实现的电路必须经常使用存储在全息存储器中的虚拟电路进行更改,因此必须快速重新配置以减少重新配置开销。实现orga中短重构时间的一种简单方法是实现高功率激光阵列。但是,这种阵列存在功耗高、实现空间大、成本高等缺点。因此,本文提出了一种在不增加激光功率的情况下提高orga重构频率的加速方法。该技术还包括重新配置上下文的数量和重新配置频率之间的优化。本文通过仿真和实验结果说明了该方法的优点。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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