A 10-bit 20 MS/s successive approximation register analog-to-digital converter using single-sided DAC switching method for control application

Abstract

In this paper 10-bit 20MS/s successive approximation register (SAR) analog-to-digital converter (ADC) implemented in TSMC 0.18-um CMOS process is presented control application as a part of the biological signal acquisition system. By applying single-sided switching method that reduces DAC switching energy, the proposed SAR ADC achieves less power consumption. Also, asynchronous control logic is used which doesn't need an external high frequency clock to drive ADC. Measured results show that at sampling rate of 20 MS/s, the proposed SAR ADC achieves a spurious-free dynamic range (SFDR) of 70.2 dB, a signal-to-noise and distortion ratio (SNDR) of 56.35 dB, an effective number of bits (ENOB) of 9.067 bits, a differential nonlinearity (DNL) of 1.2 LSB, an integral nonlinearity (INL) of 1.54 LSB and a power consumption of 910 μW. The overall chip area is only 0.57 mm2 with a small ADC core area of 0.171 mm2.