High Speed Low Power CMOS Current Comparator

V. Thrivikramaru, R. K. Baghel
{"title":"High Speed Low Power CMOS Current Comparator","authors":"V. Thrivikramaru, R. K. Baghel","doi":"10.1109/CSNT.2012.167","DOIUrl":null,"url":null,"abstract":"This work proposes the new CMOS Current Comparator circuit suitable for High Speed and Low Power applications. Proposed circuit had been simulated in a proprietary 180 nm CMOS process, using Cadence Spectre Simulator and UMC models. Current comparator circuit had impressed with current pulses ranging from Milli-Amperes to Nano-Amperes and its Speed and Power consumption had been simulated and measured. Transient response confirms the very high speed operation of the proposed Current Comparator. In addition to the above, proposed current comparator achieves very low power consumption.","PeriodicalId":174433,"journal":{"name":"2012 International Conference on Communication Systems and Network Technologies","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 International Conference on Communication Systems and Network Technologies","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSNT.2012.167","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

This work proposes the new CMOS Current Comparator circuit suitable for High Speed and Low Power applications. Proposed circuit had been simulated in a proprietary 180 nm CMOS process, using Cadence Spectre Simulator and UMC models. Current comparator circuit had impressed with current pulses ranging from Milli-Amperes to Nano-Amperes and its Speed and Power consumption had been simulated and measured. Transient response confirms the very high speed operation of the proposed Current Comparator. In addition to the above, proposed current comparator achieves very low power consumption.
高速低功耗CMOS电流比较器
本文提出了一种适用于高速低功耗应用的新型CMOS电流比较器电路。利用Cadence Spectre模拟器和UMC模型,在专有的180 nm CMOS工艺中对所提出的电路进行了仿真。对电流比较器电路进行了从毫安到纳米安培的电流脉冲模拟,并对其速度和功耗进行了模拟和测量。瞬态响应证实了所提出的电流比较器的高速运行。此外,所提出的电流比较器实现了非常低的功耗。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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