A switched current sigma delta modulator using a low distortion feedfoward topology

C. Prior, C. Rodrigues
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引用次数: 6

Abstract

Implementation of feedforward paths for low-distortion topologies on switched capacitor sigma-delta (SC-SD) modulators was successfully reported elsewhere [13]. In this paper we propose the use of a similar low distortion topology on an implementation of a switched current sigma-delta (SI-SD) modulator. The objective is a reduction of harmonic distortion observed in implementations with simple integrator cells. In this approach, one of the main SI cell drawbacks, the harmonic distortion due to conductance variation, can be reduced by alleviating the signal in the integrators path. In this approach, the integrators ideally process only noise. Relaxing requirements of integrators allows simpler and faster switched-current integrator circuits. The feedforward SI-SD modulator was designed in XFAB CMOS 0.6µm technology. Simulated results points to a reduction of harmonic distortion from 2% in a classical 2nd order feedback topology to 0.2% in the feed forward design. It also provides a reduction of 30% in the silicon area, and higher sampling frequency.
采用低失真前馈拓扑结构的开关电流σ δ调制器
在其他地方成功报道了在开关电容sigma-delta (SC-SD)调制器上实现低失真拓扑的前馈路径[13]。在本文中,我们建议在开关电流σ - δ (SI-SD)调制器的实现上使用类似的低失真拓扑。目的是减少谐波失真在实现中观察到的简单积分器单元。在这种方法中,SI单元的主要缺点之一,即电导变化引起的谐波失真,可以通过减轻积分器路径中的信号来减少。在这种方法中,积分器理想地只处理噪声。放松集成商的要求允许更简单和更快的开关电流集成商电路。前馈SI-SD调制器采用XFAB CMOS 0.6µm工艺设计。模拟结果表明,在前馈设计中,谐波失真从经典二阶反馈拓扑的2%降低到0.2%。它还提供了减少30%的硅面积和更高的采样频率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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