{"title":"Independent N-Well And P-Well Biasing For Minimum Leakage Energy Operation","authors":"Yosuke Okamura, T. Ishihara, H. Onodera","doi":"10.1109/IOLTS.2018.8474128","DOIUrl":null,"url":null,"abstract":"This paper proposes a method for minimizing leakage energy consumption under a specific supply voltage and a delay constraint by independently tuning threshold voltages of nMOSFETs and pMOSFETs with body-biasing. We first show a necessary and sufficient condition for the minimum leakage energy operation of a circuit under a delay constraint. We next show that the condition can be identified by a ratio of the leakage currents drawn through an nMOSFET and a pMOSFET in a leakage monitor circuit integrated with the targeting circuit. The leakage current ratio can be monitored at runtime using the leakage monitor. Assuming a constant supply voltage, it is thus possible to minimize the total energy consumption of the circuit by independent tuning of n-well and p-well bias voltages so that the leakage current ratio tracks the predetermined value while keeping the delay constraint. The proposed strategy is experimentally verified by measurements using a 32-bit RISC processor integrating the leakage monitor on the same die fabricated with a 65 nm CMOS process.","PeriodicalId":241735,"journal":{"name":"2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IOLTS.2018.8474128","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper proposes a method for minimizing leakage energy consumption under a specific supply voltage and a delay constraint by independently tuning threshold voltages of nMOSFETs and pMOSFETs with body-biasing. We first show a necessary and sufficient condition for the minimum leakage energy operation of a circuit under a delay constraint. We next show that the condition can be identified by a ratio of the leakage currents drawn through an nMOSFET and a pMOSFET in a leakage monitor circuit integrated with the targeting circuit. The leakage current ratio can be monitored at runtime using the leakage monitor. Assuming a constant supply voltage, it is thus possible to minimize the total energy consumption of the circuit by independent tuning of n-well and p-well bias voltages so that the leakage current ratio tracks the predetermined value while keeping the delay constraint. The proposed strategy is experimentally verified by measurements using a 32-bit RISC processor integrating the leakage monitor on the same die fabricated with a 65 nm CMOS process.