Chips and Computers for Artificial Neural Nets

Abstract

In this chapter we have described a small number of chips and neurocomputers for artificial neural nets. The architectures presented are commercially available. As examples, we have presented two chips (ETANN and Nestor / Intel Ni100), two neurocomputers based on standard components (MUSIC, HNC SNAP), and two neurocomputers (CNAPS, SYNAPSE) with special chips (X1 and MA16, respectively). An overview is given in Table 6-1. The following abbreviations are used: NP for number of processors, M for memory, WL for word length, SISD for single instruction single data, SIMD for single instruction multiple data, MIMD for multiple instructions multiple data, BP for back-propagation and SOM for Kohonens self-organizing map. The presented values are taken from [3, 5, 7] and [13].