Reducing power in high-performance microprocessors

V. Tiwari, Deo Singh, S. Rajgopal, G. Mehta, Rakesh J. Patel, F. Baez
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引用次数: 377

Abstract

Power consumption has become one of the biggest challenges in high-performance microprocessor design. The rapid increase in the complexity and speed of each new CPU generation is outstripping the benefits of voltage reduction and feature size scaling. Designers are thus continuously challenged to come up with innovative ways to reduce power, while trying to meet all the other constraints imposed on the design. This paper presents an overview of the issues related to power consumption in the context of Intel CPUs. The main trends that are driving the increased focus on design for low power are described. System and benchmarking issues, and sources of power consumption in a high-performance CPU are briefly described. Techniques that have been tried on real designs in the past are described. The role of CAD tools and their limitations in this domain are also discussed. In addition, areas that need increased research focus in the future are also pointed out.
降低高性能微处理器的功耗
功耗已经成为高性能微处理器设计的最大挑战之一。每一代新CPU的复杂性和速度的快速增长都超过了电压降低和特征尺寸缩放的好处。因此,设计师们面临着不断的挑战,要想出创新的方法来降低能耗,同时还要努力满足设计中施加的所有其他限制。本文概述了英特尔cpu中与功耗相关的问题。描述了推动低功耗设计的主要趋势。简要描述了系统和基准测试问题,以及高性能CPU的功耗来源。描述了过去在实际设计中尝试过的技术。本文还讨论了CAD工具的作用及其在这一领域的局限性。此外,还指出了今后需要加强研究的领域。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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