Abacus: A Processor Family for Education

Abstract

We present the Abacus processor family and its compiler framework for the MiniC language that we have developed for teaching processor architectures. Besides typical RISC instructions, Abacus also offers instructions for vector processing and thread synchronization, but it is still small enough to be discussed completely in a class. With reasonable effort, students can therefore modify given implementations of micro-architectures and code generators to deepen their understanding of the theoretical concepts. Moreover, using benchmark examples, they can explore the quantitative aspects of their optimizations. In contrast to commercial and other educational processors, we provide many micro-architectures that are based on a pure concept only rather than on a combination of concepts, and we provide code generators which contain the core ideas of some architectures.