GaAs MOS Capacitors and Self-Aligned MOSFETs with HfO2 Gate Dielectrics

S. Koester, E. Kiewra, Yanning Sun, D. Neumayer, J. Ott, D. Sadana, D. Webb, J. Fompeyrine, J. Locquet, M. Sousa, R. Germann
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Abstract

Introduction: The difficulty of increasing performance by scaling in sub-100 nm Si CMOS technology has renewed interest in the use of Ill-V channel materials for advanced VLSI CMOS [1]. GaAs is an attractive choice for this application, due to its relative maturity compared to other III-Vs, its high electron mobility (6x compared to Si), and its lattice matching with Ge. The main barrier towards implementing GaAs for VLSI applications is the difficulty of forming a high-quality gate insulator [2]-[6]. However, other problems also need to be overcome, including poor thermal stability, low implant activation, and the lack of a self-aligned contacting scheme. In this work, we seek to address the integration and gate dielectric issues. We have developed a self-aligned process for GaAs MOSFETs with HfO2 gate dielectrics, and demonstrate functional enhancementand depletion-mode devices. We have also characterized MOS capacitors with GaAs/u-Si/SiO2/HfO2 gate stacks, and found that these structures have much lower DA and improved thermal stability compared to HfO2 films directly on GaAs.
具有HfO2栅极介质的GaAs MOS电容器和自对准mosfet
引言:在100纳米以下的Si CMOS技术中,通过缩放来提高性能的困难重新引起了人们对使用Ill-V通道材料用于先进VLSI CMOS的兴趣[1]。由于与其他iii - v相比,GaAs相对成熟,电子迁移率高(与Si相比为6倍),并且其晶格与Ge匹配,因此GaAs是该应用的一个有吸引力的选择。在VLSI应用中实现GaAs的主要障碍是难以形成高质量的栅极绝缘体[2]-[6]。然而,其他问题也需要克服,包括热稳定性差,植入物激活低,缺乏自对准接触方案。在这项工作中,我们试图解决集成和栅极介电问题。我们开发了一种具有HfO2栅极介质的GaAs mosfet的自对准工艺,并演示了功能增强和耗尽模式器件。我们还对GaAs/u-Si/SiO2/HfO2栅极堆叠的MOS电容器进行了表征,发现与直接在GaAs上制备HfO2薄膜相比,这些结构具有更低的DA和更好的热稳定性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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