Fuzzy modular multiplication architecture and low complexity IPR-protection for FPGA technology

A. Hanoun, W. Adi, F. Mayer-Lindenberg, B. Soudan
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引用次数: 4

Abstract

The strong possibility of pirating, reengineering and over-deployment is a major impediment to the commercialization of IP-cores in the FPGA design environment. A mechanism for IP-protection based on public key bitstream encryption has previously been proposed. This paper describes a reasonable cost practical realization of the modular multiplication function required for the previously proposed system. A technique called fuzzy modular multiplication is employed to decrease the cost of modular squaring computations required for the public key exchange. An implementation using the Virtex-4 device from Xilinxreg is demonstrated to illustrate the low complexity cost. A refinement of the IP exchange scenario for the proposed IP-protection system is also included in this paper
FPGA技术的模糊模块化乘法结构和低复杂度知识产权保护
盗版、重新设计和过度部署的可能性是FPGA设计环境中ip核商业化的主要障碍。先前已经提出了一种基于公钥比特流加密的ip保护机制。本文描述了一种成本合理、实用的模块化乘法功能实现方法。使用一种称为模糊模乘法的技术来降低公钥交换所需的模平方计算的成本。演示了使用Xilinxreg的Virtex-4设备的实现,以说明低复杂性成本。本文还对所提议的知识产权保护系统的知识产权交换方案进行了改进
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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