Design and Implementation of a Pipelined Median Filter Architecture

Abstract

Today, image processing applications are frequently chosen in parallel with technological developments in areas such as security, health and traffic control. The most important criterion for used applications in these areas is to ensure that the system operates at high speed and in real time. Thereby, FPGAs are frequently used in such applications. An image processing algorithm is implemented in an FPGA-based development kit in this work. The ZedBoard Znyq-7000 development kit produced by Xilinx Company is used. The median filter as a nonlinear operator utilized for an oriented anisotropic diffusion function to reduce noise and preserve the edges, is performed on medical images. A pipelined architecture is proposed and developed. Experimental results show the filter efficiency in terms of processing time and image quality. The median filter runs at $81.1 \mu s$ for a human chest radiology of size $100\times 100$ with a PSNR of 35.07 dB.