Donggeun You, Hyunwoo Heo, Hyungseup Kim, Yongsu Kwon, H. Ko, Sangmin Lee
{"title":"A Current Feedback Instrumentation Amplifier with Current Reuse and Power Line Interference Mitigation Technique for ECG Recording","authors":"Donggeun You, Hyunwoo Heo, Hyungseup Kim, Yongsu Kwon, H. Ko, Sangmin Lee","doi":"10.1109/ISOCC50952.2020.9332918","DOIUrl":null,"url":null,"abstract":"This paper proposes a current feedback instrumentation amplifier (CFIA) with current reuse and power line interference (PLI) mitigation technique for electrocardiogram (ECG) recording. The proposed PLI mitigation circuits are consisted of continuous time common mode current feedback circuit and DC servo loop. The proposed PLI mitigation circuits effectively remove PLI which has tens of volts without electrostatic discharge (ESD) diode saturation and a high-quality ECG signal can be achieved. The proposed current reused CFIA is robust to electrodes mismatch as the current feedback topology has high input impedance. Also, a current reuse scheme in CFIA enables to high Gm/Id efficiency. The proposed circuit is implemented in 180 nm bipolar complementary metal oxide semiconductor double diffused metal oxide semiconductor (BCDMOS).","PeriodicalId":270577,"journal":{"name":"2020 International SoC Design Conference (ISOCC)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International SoC Design Conference (ISOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISOCC50952.2020.9332918","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper proposes a current feedback instrumentation amplifier (CFIA) with current reuse and power line interference (PLI) mitigation technique for electrocardiogram (ECG) recording. The proposed PLI mitigation circuits are consisted of continuous time common mode current feedback circuit and DC servo loop. The proposed PLI mitigation circuits effectively remove PLI which has tens of volts without electrostatic discharge (ESD) diode saturation and a high-quality ECG signal can be achieved. The proposed current reused CFIA is robust to electrodes mismatch as the current feedback topology has high input impedance. Also, a current reuse scheme in CFIA enables to high Gm/Id efficiency. The proposed circuit is implemented in 180 nm bipolar complementary metal oxide semiconductor double diffused metal oxide semiconductor (BCDMOS).