Performance analysis of FinFET and negative capacitance FET over 6T SRAM

D. Vaithiyanathan, M. B. Raj, S. Pushpa, R. Seetharaman
{"title":"Performance analysis of FinFET and negative capacitance FET over 6T SRAM","authors":"D. Vaithiyanathan, M. B. Raj, S. Pushpa, R. Seetharaman","doi":"10.1109/ICCS1.2017.8325989","DOIUrl":null,"url":null,"abstract":"The need for high performance system has pushed the limits of Moore's law to extend for future decades. This caused the evolution of compact transistors and produced the ultra scale thin film transistor called FinFET. Although the fully depleted SOI transistor (FD-SOI seems to be promising factor, FinFET replaced it for its resistance to short channel effects. The technological advancement further seeks a low power design and urges the core material to operate at its extreme low threshold point. This paper records various short channel effects such as SS, DIBL, threshold voltage of FinFET and NCFET stacked SRAM device in terms of delay, leakage power and signal to noise margin(SNM).","PeriodicalId":367360,"journal":{"name":"2017 IEEE International Conference on Circuits and Systems (ICCS)","volume":"22 6S 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE International Conference on Circuits and Systems (ICCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCS1.2017.8325989","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8

Abstract

The need for high performance system has pushed the limits of Moore's law to extend for future decades. This caused the evolution of compact transistors and produced the ultra scale thin film transistor called FinFET. Although the fully depleted SOI transistor (FD-SOI seems to be promising factor, FinFET replaced it for its resistance to short channel effects. The technological advancement further seeks a low power design and urges the core material to operate at its extreme low threshold point. This paper records various short channel effects such as SS, DIBL, threshold voltage of FinFET and NCFET stacked SRAM device in terms of delay, leakage power and signal to noise margin(SNM).
FET和负电容FET在6T SRAM上的性能分析
对高性能系统的需求已经将摩尔定律的极限推向了未来几十年。这导致了紧凑晶体管的发展,并产生了被称为FinFET的超尺度薄膜晶体管。虽然完全耗尽的SOI晶体管(FD-SOI)似乎是一个有前途的因素,但FinFET取代了它,因为它具有抗短通道效应的能力。技术进步进一步寻求低功耗设计,并促使核心材料在其极低阈值点上运行。本文记录了FinFET和NCFET堆叠SRAM器件的SS、DIBL、阈值电压等各种短通道效应在延迟、漏功率和信噪比裕度(SNM)方面的变化。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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