Hardware and software modelling and testing of non-conventional data-flow architecture

2016 IEEE NW Russia Young Researchers in Electrical and Electronic Engineering Conference (EIConRusNW) Pub Date : 2016-04-07 DOI:10.1109/EICONRUSNW.2016.7448187

Yu. V. Shikunov, D. Khilko, Y. Stepchenkov

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引用次数: 6

Abstract

This paper covers new recurrent data-flow computational model, as well as architecture that implements principles and ideas of this model. Basic differences of this model from the existing ones and examine key aspects of this new computational model including its implementation in the form of Hybrid Recurrent Architecture of Digital Signal Processor are described. The approach and methodology of hardware and software modelling and testing based on new architecture are being proposed. We introduce the model of implementation of the proposed architecture as well as imitation modelling tools of recurrent data-flow architecture, implementing said model. Functionality of imitation model and its role in software development suite for new architecture software development is being described. We introduce the notion of the target modelling platform called GAROS IDE. The results of platform testing on several subtasks of isolated words recognition problem are presented.

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非常规数据流体系结构的软硬件建模与测试

本文介绍了一种新的循环数据流计算模型，以及实现该模型原理和思想的体系结构。描述了该模型与现有模型的基本区别，并研究了该新计算模型的关键方面，包括其以数字信号处理器混合循环结构的形式实现。提出了基于新体系结构的软硬件建模与测试的方法和方法。介绍了所提体系结构的实现模型，以及实现所提模型的循环数据流体系结构的仿真建模工具。描述了仿真模型的功能及其在新体系结构软件开发中的作用。我们介绍了目标建模平台GAROS IDE的概念。给出了孤立词识别问题若干子任务的平台测试结果。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2016 IEEE NW Russia Young Researchers in Electrical and Electronic Engineering Conference (EIConRusNW)

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