A study on the constructions of MOVAGs based on algorithm for multiple-valued logic function manipulation and the circuit design using T-gate

Proceedings of IEEE. IEEE Region 10 Conference. TENCON 99. 'Multimedia Technology for Asia-Pacific Information Infrastructure' (Cat. No.99CH37030) Pub Date : 1999-09-15 DOI:10.1109/TENCON.1999.818433

Byoung-Hee Yoon, J. Choi, Jong-Hak Hwang, Heung-Soo Kim

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Abstract

The multiple-valued decision diagram (MDD) and the ordered MDD (OMDD) are used widely to represent multiple-valued logic functions. In the case of p-value n-variable, the number of nodes that increase to p/sup (n-1)/ certainly are reduced by using the reduced OMDD (ROMDD). However, multi-variables derive much more processing time. To improve this problem, the multiple-valued logic function must be represented by the output value array graphs (OVAG) with an input implicit/output explicit relation in binary systems. The representation of the MDD in a difficult situation derives an easier graph with an output value array by using the multi-OVAG (MOVAG). We propose the implementation method of the MOVAG and algorithm for the transition to MOVAG in the circuit. We verify the development of the processing time according to the reduced nodes.

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基于多值逻辑函数处理算法的MOVAGs结构及t门电路设计研究

多值决策图(MDD)和有序决策图(OMDD)被广泛用于表示多值逻辑函数。在p值为n变量的情况下，通过使用减少的OMDD (ROMDD)，增加到p/sup (n-1)/的节点数量肯定会减少。然而，多变量需要更多的处理时间。为了改善这一问题，必须用二元系统中具有输入隐/输出显关系的输出值数组图(OVAG)来表示多值逻辑函数。在困难情况下，MDD的表示通过使用multi-OVAG (MOVAG)派生出一个带有输出值数组的更容易的图。我们提出了MOVAG的实现方法以及在电路中过渡到MOVAG的算法。我们根据减少的节点来验证处理时间的发展。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Proceedings of IEEE. IEEE Region 10 Conference. TENCON 99. 'Multimedia Technology for Asia-Pacific Information Infrastructure' (Cat. No.99CH37030)

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