An 8 ns 1 Mb ECL BiCMOS SRAM

M. Matsui, H. Momose, Y. Urakawa, T. Maeda, A. Suzuki, N. Urakawa, K. Sato, K. Makita, J. Matsunaga, K. Ochii
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引用次数: 15

Abstract

A description is given of a 1-Mb*1ECL (emitter-coupled-logic) SRAM (static random access memory) fabricated with a 0.8- mu m BiCMOS technology which has 8-ns access time and is 10K-I/O (input/output) compatible. To achieve sub-10 ns address access time and low power consumption, an ECL CMOS level converter, a bit-line peripheral circuit, and an automatic power saving function are employed. Details of the 0.8- mu m BiCMOS process technology are summarized, and an oscilloscope photograph shows 8-ns address access time under nominal conditions. The RAM characteristics are summarized.<>
一个8n1mb ECL双mos SRAM
介绍了一种采用0.8 μ m BiCMOS技术制造的1 mb *1ECL静态随机存取存储器(SRAM),具有8 ns的存取时间和10K-I/O(输入/输出)兼容。为了实现低于10ns的地址访问时间和低功耗,采用ECL CMOS电平转换器、位线外设电路和自动节电功能。概述了0.8 μ m BiCMOS工艺技术的细节,并通过示波器照片显示了在标称条件下8-ns的地址访问时间。总结了RAM的特性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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