A 5-Gb/s 11.4mW half-rate CDR in 0.18μm CMOS

Abstract

A low-power clock and data recovery(CDR) circuit with a phase detector(PD) using dynamic current-mode logic latches and a novel V/I converter is described. The proposed latch draws a current during half of the clock cycle and the proposed V/I converter includes the XOR function by itself. The half-rate CDR circuit is simulated using 5-Gb/s with 0.18-um CMOS technology, and the circuit consumes only 11.4mW from a 1.8-V supply.