Implementing a self-checking neural system for photon event identification by SRAM-based FPGAs

Abstract

The paper presents and evaluates the design and the implementation of a self-checking neural system for photon event identification in intensified charge-coupled device detectors. The neural approach reveals more effective than classical algorithmic approaches thanks to its learning through example ability. Implementation is accomplished by SRAM-based FPGAs, which have generated increasing interest in the space community. The adoption of suitable on-line fault detection techniques is illustrated taking into account in a specific way SEU induced faults. The techniques are based on AN coding, particularly 3N coding, which constitutes a reasonable trade-off between circuit complexity and computational delay. Estimations of circuit area overhead and fault coverage are reported.