BaBaNoC: An asynchronous network-on-chip described in Balsa

Abstract

The downscaling of silicon technology and the possibility of building MPSoCs, make intrachip communication a mainstream research topic. NoCs are an elegant solution to provide communication scalability and modularity. NoCs are already common in MPSoC design. Moreover, new technology challenges point to a growth in the use of non-synchronous NoCs. However, the design of asynchronous infrastructures with current EDA tools is challenging. That is due to the fact that most of these tools are oriented towards synchronous design. This work proposes and evaluates a fully asynchronous NoC router based on the Balsa language and framework. The design is validates through FPGA synthesis.