GeneticFPGA: evolving stable circuits on mainstream FPGA devices

Delon Levi, S. Guccione
{"title":"GeneticFPGA: evolving stable circuits on mainstream FPGA devices","authors":"Delon Levi, S. Guccione","doi":"10.1109/EH.1999.785430","DOIUrl":null,"url":null,"abstract":"GeneticFPGA is a Java-based tool for evolving digital circuits on Xilinx XC4000EX/sup TM/ and XC4000XL/sup TM/ devices. Unlike other FPGA architectures popular with evolutionary hardware researchers, the XC4000 series architectures cannot accept arbitrary configuration data. Only a small subset of configuration bit patterns will produce operational circuits; other configuration bit patterns produce circuits which are unreliable and may even permanently damage the FPGA device. GeneticFPGA uses novel software techniques to produce legal circuit configurations for these devices, permitting experimentation with evolvable hardware on the larger, faster more mainstream devices. In addition, these techniques have led to methods for evolving circuits which are neither temperature, voltage, nor silicon dependent. An 8-bit counter and several digital frequency dividers have been successfully evolved using this approach. GeneticFPGA uses Xilinx's JBits/sup TM/ interface to control the generation of bitstream configuration data and the XHWIF portable hardware interface to communicate with a variety of commercially available FPGA-based hardware. GeneticFPGA, JBits, and XHWIF are currently being ported to the Xilinx Virtex/sup TM/ family of devices, which will provide greatly increased reconfiguration speed and circuit density.","PeriodicalId":234639,"journal":{"name":"Proceedings of the First NASA/DoD Workshop on Evolvable Hardware","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-07-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"49","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the First NASA/DoD Workshop on Evolvable Hardware","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EH.1999.785430","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 49

Abstract

GeneticFPGA is a Java-based tool for evolving digital circuits on Xilinx XC4000EX/sup TM/ and XC4000XL/sup TM/ devices. Unlike other FPGA architectures popular with evolutionary hardware researchers, the XC4000 series architectures cannot accept arbitrary configuration data. Only a small subset of configuration bit patterns will produce operational circuits; other configuration bit patterns produce circuits which are unreliable and may even permanently damage the FPGA device. GeneticFPGA uses novel software techniques to produce legal circuit configurations for these devices, permitting experimentation with evolvable hardware on the larger, faster more mainstream devices. In addition, these techniques have led to methods for evolving circuits which are neither temperature, voltage, nor silicon dependent. An 8-bit counter and several digital frequency dividers have been successfully evolved using this approach. GeneticFPGA uses Xilinx's JBits/sup TM/ interface to control the generation of bitstream configuration data and the XHWIF portable hardware interface to communicate with a variety of commercially available FPGA-based hardware. GeneticFPGA, JBits, and XHWIF are currently being ported to the Xilinx Virtex/sup TM/ family of devices, which will provide greatly increased reconfiguration speed and circuit density.
GeneticFPGA:在主流FPGA器件上进化稳定电路
GeneticFPGA是一种基于java的工具,用于在Xilinx XC4000EX/sup TM/和XC4000XL/sup TM/设备上发展数字电路。与演进硬件研究人员流行的其他FPGA架构不同,XC4000系列架构不能接受任意配置数据。只有一小部分配置位模式会产生操作电路;其他配置位模式产生的电路不可靠,甚至可能永久损坏FPGA器件。GeneticFPGA使用新颖的软件技术为这些设备生成合法的电路配置,允许在更大、更快的主流设备上试验可进化的硬件。此外,这些技术导致了既不依赖于温度、电压也不依赖于硅的进化电路的方法。一个8位计数器和几个数字分频器已经成功地发展使用这种方法。GeneticFPGA使用Xilinx的JBits/sup TM/接口来控制位流配置数据的生成,XHWIF便携式硬件接口与各种商用fpga硬件进行通信。目前,genticfpga、JBits和XHWIF正在被移植到Xilinx Virtex/sup TM/系列设备上,这将大大提高重构速度和电路密度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信