All-Digital PLL with Variable Loop Type Characteristics

R. Staszewski, J. Wallberg, P. Balsara
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引用次数: 0

Abstract

A fully-digital frequency synthesizer for RF wireless applications has recently been proposed. It replaces the conventional VCO with a digitally-controlled oscillator with sufficiently fine frequency resolution. The conventional phase/frequency detector, charge pump and RC loop filter are replaced by a time-to-digital converter and a simple digital loop filter. In this paper, we present novel techniques used in the all-digital PLL to achieve ultra-fast frequency acquisition of < 50 mus while maintaining excellent phase noise and spurious performance during transmission and reception. This approach has been validated and incorporated in commercial single-chip Bluetooth and GSM radios realized in deep-submicron CMOS
具有可变环型特性的全数字锁相环
最近提出了一种用于射频无线应用的全数字频率合成器。它用一个具有足够好的频率分辨率的数字控制振荡器取代了传统的压控振荡器。传统的相位/频率检测器,电荷泵和RC环路滤波器被时间-数字转换器和简单的数字环路滤波器所取代。在本文中,我们提出了用于全数字锁相环的新技术,以实现< 50 mus的超快频率采集,同时在发射和接收期间保持良好的相位噪声和杂散性能。该方法已被验证并应用于商用单芯片蓝牙和GSM无线电中,这些无线电是在深亚微米CMOS中实现的
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