{"title":"All-Digital PLL with Variable Loop Type Characteristics","authors":"R. Staszewski, J. Wallberg, P. Balsara","doi":"10.1109/DCAS.2006.321047","DOIUrl":null,"url":null,"abstract":"A fully-digital frequency synthesizer for RF wireless applications has recently been proposed. It replaces the conventional VCO with a digitally-controlled oscillator with sufficiently fine frequency resolution. The conventional phase/frequency detector, charge pump and RC loop filter are replaced by a time-to-digital converter and a simple digital loop filter. In this paper, we present novel techniques used in the all-digital PLL to achieve ultra-fast frequency acquisition of < 50 mus while maintaining excellent phase noise and spurious performance during transmission and reception. This approach has been validated and incorporated in commercial single-chip Bluetooth and GSM radios realized in deep-submicron CMOS","PeriodicalId":244429,"journal":{"name":"2006 IEEE Dallas/CAS Workshop on Design, Applications, Integration and Software","volume":"254 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE Dallas/CAS Workshop on Design, Applications, Integration and Software","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DCAS.2006.321047","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A fully-digital frequency synthesizer for RF wireless applications has recently been proposed. It replaces the conventional VCO with a digitally-controlled oscillator with sufficiently fine frequency resolution. The conventional phase/frequency detector, charge pump and RC loop filter are replaced by a time-to-digital converter and a simple digital loop filter. In this paper, we present novel techniques used in the all-digital PLL to achieve ultra-fast frequency acquisition of < 50 mus while maintaining excellent phase noise and spurious performance during transmission and reception. This approach has been validated and incorporated in commercial single-chip Bluetooth and GSM radios realized in deep-submicron CMOS