A New Dual Loop Frequency Synthesizer for the Wireless Standard 802.11g

Iulian Ursac, F. Constantinescu
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Abstract

A new type of frequency synthesizer is proposed in this paper. It employs a variable frequency reference, a digital phase lock loop (PLL) including a dead zone circuit for the coarse frequency control, and an analog PLL for the fine frequency control. This structure allows the replacement of the classical variable ratio fractional frequency divider by a constant integer ratio one, that allows a significant reduction of the phase noise.
一种用于无线标准802.11g的新型双环频率合成器
本文提出了一种新型频率合成器。它采用了一个可变频率基准,一个数字锁相环(PLL),其中包括一个用于粗频率控制的死区电路,以及一个用于细频率控制的模拟锁相环。这种结构允许用常数整数比1取代经典的可变比分数分频器,从而显著降低相位噪声。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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