{"title":"Design of a 4 GHz quadrature LC -VCO with transformer coupling","authors":"Wu Xiushan, Wang Zhigong, Li Zhiqun, Li Qing","doi":"10.1109/ICMMT.2008.4540536","DOIUrl":null,"url":null,"abstract":"A 4 GHz quadrature voltage-controlled oscillator (QVCO) topology is proposed where a planar spiral transformer is used as coupling terminals. Two identical LC oscillators are cross-coupled by the transformer to generate the quadrature outputs. The transformer also serves as filtering network for the oscillators to improve the phase noise performance. The quadrature oscillator based on the proposed topology with additional design ideas has been implemented in a 0.18 um mixed-signal 1P6M CMOS technology for 4 GHz-band operation. The simulation gave a phase noise of -122 dBc/Hz at 1 MHz offset with an output power of 1 dBm, while dissipating 7.8 mA under a 1.8 V supply.","PeriodicalId":315133,"journal":{"name":"2008 International Conference on Microwave and Millimeter Wave Technology","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-04-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 International Conference on Microwave and Millimeter Wave Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMMT.2008.4540536","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
A 4 GHz quadrature voltage-controlled oscillator (QVCO) topology is proposed where a planar spiral transformer is used as coupling terminals. Two identical LC oscillators are cross-coupled by the transformer to generate the quadrature outputs. The transformer also serves as filtering network for the oscillators to improve the phase noise performance. The quadrature oscillator based on the proposed topology with additional design ideas has been implemented in a 0.18 um mixed-signal 1P6M CMOS technology for 4 GHz-band operation. The simulation gave a phase noise of -122 dBc/Hz at 1 MHz offset with an output power of 1 dBm, while dissipating 7.8 mA under a 1.8 V supply.