{"title":"A Negative Group Delay Circuit using Substrate Integrated Suspended Line","authors":"Jian‐Kang Xiao, Xiao-Yun Yang","doi":"10.1109/CSQRWC.2019.8799288","DOIUrl":null,"url":null,"abstract":"A novel self-packaged substrate integrated suspended line (SISL) negative group delay (NGD) circuit is proposed by using the common multi-layer PCB techniques, which eliminates the drawbacks of bulky circuit size, heavy weight and difficult to be integration for the traditional suspended stripline circuits. Both self-packaging and metallized air cavities are used to reduce the wave leakage, and the multiple via holes are saved, which greatly reduce the simulation time and the fabrication complexity. The proposed NGD circuit has a NGD time of -3.8ns with signal attenuation (S21) of no more than 2.1dB, and a S11 attenuation of more than 38dB.","PeriodicalId":254491,"journal":{"name":"2019 Cross Strait Quad-Regional Radio Science and Wireless Technology Conference (CSQRWC)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 Cross Strait Quad-Regional Radio Science and Wireless Technology Conference (CSQRWC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSQRWC.2019.8799288","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
A novel self-packaged substrate integrated suspended line (SISL) negative group delay (NGD) circuit is proposed by using the common multi-layer PCB techniques, which eliminates the drawbacks of bulky circuit size, heavy weight and difficult to be integration for the traditional suspended stripline circuits. Both self-packaging and metallized air cavities are used to reduce the wave leakage, and the multiple via holes are saved, which greatly reduce the simulation time and the fabrication complexity. The proposed NGD circuit has a NGD time of -3.8ns with signal attenuation (S21) of no more than 2.1dB, and a S11 attenuation of more than 38dB.