A 0.5 V power-supply scheme for low power LSIs using multi-Vt SOI CMOS technology

Abstract

Describes a novel power-supply scheme suitable for 0.5V operating LSIs. The system contains the on-chip buck dc-dc converter with over-90% efficiency, 0.5V operating logic, 100MHz operating F/Fs with holding data in the stand-by mode, and the dual-rail level converter. The dc-dc converter TEG, fabricated using 0.35/spl mu/m multi-Vt SOI CMOS process, realized stable recovery characteristics and a final stage efficiency of 92% with 0.5V/10mW output.