A 2.5 GHz CMOS fully-integrated /spl Delta//spl Sigma/-controlled fractional-N frequency synthesizer

Abstract

The design of a fully-integrated /spl Delta//spl Sigma/-controlled fractional-N frequency synthesizer is described. Using a dual modulus 64/72 prescaler based on injection locking technique and a novel third order digital /spl Delta//spl Sigma/ modulator, we achieved an extremely low power synthesizer in 2.5 GHz band. Total power dissipation of the frequency synthesizer is less than 6 mW at a 1.5 V supply. The loop bandwidth is optimized to achieve a -123 dBc/Hz phase noise at 3 MHz offset frequency. The locking time of the loop is less than 30 /spl mu/s.