Signature analyzers in built-in self-test circuits: a perspective

Abstract

The test response compression technique using signature analyzers or linear feedback shift registers (LFSRs) is discussed and some representative built-in self-test (BIST) designs which make use of LFSRs are presented. Signature analysis is a compression technique based on the concept of cyclic redundancy checking (CRC) and realized in hardware using LFSRs. The input to the LFSR is received from the output of a multiple input single output circuit under test (CUT). The structure and characteristics of LFSRs including a simplified mathematical analysis showing the confidence level in detecting faults are discussed. Some BIST design examples which include a programmable logic array, semiconductor memory, and a microcomputer are presented.<>