Performance improvement of multiprocessor simulation by optimizing synchronization and communication

Abstract

This paper presents fast co-simulation techniques aimed at multiprocessor-based system-on-chip (SoC) design. Unlike existing co-simulation tools that use a centralized server, which manages clocks for all processor models and inter-processor communication, the proposed techniques separate the synchronization and communication and distribute the large portion of the tasks to each processor model. The amount of synchronization is reduced, and the message passing among the processor models through time-consuming inter-process communication (IPC) is removed. Fast processor model through automatically annotated native code execution is also introduced. We implemented these solutions in STIMUL, a co-simulation framework for multiprocessor system and achieved faster simulation speed by at least a factor of 10 over existing simulators.