ICCAD-2014 CAD contest in incremental timing-driven placement and benchmark suite: Special session paper: CAD contest

Abstract

Circuit performance is greatly affected by the quality and optimization metrics of placement algorithms. At modern technology nodes, improving routability and reducing total wirelength are no longer sufficient to close timing, as nets may require specialized attention to reduce negative slack. To this end, incremental timing-driven placement (TDP) seeks to address these imposed timing constraints by leveraging timing information during optimization while respecting relative density and displacement thresholds with respect to the original placement. The goal of the ICCAD-2014 Contest is to encourage research in incremental TDP by providing (i) a flexible timing-oriented placement framework, including a publicly-available academic timer, (ii) a set of benchmarks and the associated cell library with timing information and (iii) an evaluation metric that objectively defines the quality of newly-developed algorithms.