{"title":"Common-mode rejection ratio analysis of rail-rail input stage fully differential two-stage OP-AMP","authors":"K. Trijpech","doi":"10.1109/ISPACS.2007.4445919","DOIUrl":null,"url":null,"abstract":"A fully differential rail-rail input stage and class AB output stage with and without common-mode feedback circuit are proposed. There are at least 4 schematics to be proposed. The first schematic is CMOS rail-rail input stage and class AB output stage without common-mode feedback (CMFB) circuit. The second schematic is CMOS rail-rail input stage and class AB output stage with CMFB circuit. For low voltage operation, the tail current sources of the first and second schematics are removed. As a consequence, there is no voltage drop between drain and source terminals of the current source, and bulk-source voltage effect of the input transistor is removed.","PeriodicalId":220276,"journal":{"name":"2007 International Symposium on Intelligent Signal Processing and Communication Systems","volume":"82 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 International Symposium on Intelligent Signal Processing and Communication Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPACS.2007.4445919","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A fully differential rail-rail input stage and class AB output stage with and without common-mode feedback circuit are proposed. There are at least 4 schematics to be proposed. The first schematic is CMOS rail-rail input stage and class AB output stage without common-mode feedback (CMFB) circuit. The second schematic is CMOS rail-rail input stage and class AB output stage with CMFB circuit. For low voltage operation, the tail current sources of the first and second schematics are removed. As a consequence, there is no voltage drop between drain and source terminals of the current source, and bulk-source voltage effect of the input transistor is removed.