Linearity Enhancement Using a Common-Drain Topology for Envelope Tracking CMOS Power Amplifiers

Abstract

This work discusses about the linearity challenges of a radio frequency power amplifier (RF-PA) using envelope tracking (ET) technique. ET modulators vary the supply voltage of a PA to improve its efficiency, but also add undesired ripple at the supply node which affect the PA's linearity. Also, device non-linearities of the PA add distortion to the transmitted signal and degrade its spectral purity. To overcome the aforementioned issues, a fully differential common-drain architecture for the PA is proposed and linearity enhancement is demonstrated in TSMC CMOS 65 nm technology.