Reducing static linearity testing for ADCs

Abstract

Static linearity testing of Analog-to-Digital Converters (ADCs) is known to be a time-consuming process. This paper describes a method exploiting the Compressed Sensing to reduce time in ADCs for linearity testing based on the static transfer curve. The proposed method reduces randomly the input voltage values to characterize the ADC, computing reduced values of Integral Nonlinearity (INL). Subsequently, the complete INL curve is reconstructed, by exploiting the INL sparsity in the Fourier domain. By comparing the INL curve obtained by the standard method to the reconstructed INL curve, the error value is generally low. Thus, the proposed method results promising to reduce the overall duration of static linearity testing for ADCs.