Charge loss in TANOS devices caused by Vt sensing measurements during retention

H. Park, G. Bersuker, D. Gilmer, K. Lim, M. Jo, H. Hwang, A. Padovani, L. Larcher, P. Pavan, W. Taylor, P. Kirsch
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引用次数: 10

Abstract

In TANOS stuctures in retention, the major decrease in the programmed threshold voltage is found to be caused by the Vt sensing (IdVg measurements) rather than by intrinsic charge loss (when no bias is applied). This Vt decrease can be understood within the process of the temperature-activated charge transport through the Al2O3 blocking oxide. The charge loss can be minimized when Vt sensing time is decreased down to micro seconds. Blocking oxides engineered by adding a thin SiO2 layer at the SiN/AlO interface demonstrate significant suppression of the charge loss.
在保留期间由Vt传感测量引起的TANOS器件中的电荷损失
在保留的TANOS结构中,发现编程阈值电压的主要下降是由Vt感测(IdVg测量)引起的,而不是由固有电荷损失引起的(当没有施加偏置时)。这种Vt的降低可以在温度激活电荷通过Al2O3阻断氧化物的过程中理解。当Vt感测时间减小到微秒时,电荷损失可以最小化。通过在SiN/AlO界面上添加薄SiO2层来设计阻隔氧化物,可以显著抑制电荷损失。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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