Development Of Zero X-y Shrinkage Sintered Ceramic Substrate

Abstract

Studies of multilayered ceramic substrate are made briskly ,which makes it possible to design wiring patterns high densely and to mount bare IC chips. The multilayered cbramic substrate is expected for effectiveness for high functional, downsizing and confidential devices. In order to realize high density ceramic Multi-Chip-Module (MCM), multilayered ceramic substrate is required to satisfy demands for fine patterning, small packaging and low cost, Especially, sintering shrinkage of a substrate should be. controlled for fine patteming. Generally, the ceramic substrate undergoes its shrinkage of 10 to 15% and the shrinkage error is *OS%, so the substrate is not suitable for mounting bare IC chips. On considering of such problem, zero X-Y shrinkage sintered ceramic substrate (ZSS) has been developed by the conventional green sheet method, which arranges substrate green sheets between two no-shrinkage sheets, horizontal shrinkage during sintering is prevented to 0.18, and the shrinkage error i s f 0.05%. In this paper, we will report a material, process for prohibiting the horizontal shrinkage and properties of ZSS. .