A harmonic quadrature LO generator using a 90/spl deg/ delay-locked loop [zero-IF transceiver applications]

J. Craninckx, V. Gravot, S. Donnay
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引用次数: 6

Abstract

To overcome problems with DC-offsets and LO pulling in zero-IF transceivers, a technique is presented to generate quadrature LO signals from an oscillator signal that is the N-th subharmonic of the desired RF frequency. A delay-locked loop is used to generate a set of LO signals that are spaced 90/spl deg//N apart. These can be applied directly to a harmonic mixer, or combined into quadrature LO signals for a standard mixer. A prototype implementation generates quadrature LO signals for a direct-conversion 5 GHz WLAN mixer from a half-frequency VCO in a 0.35 /spl mu/m BiCMOS process. The current consumption is 9 mA and die area is 0.12 mm/sup 2/.
一种使用90/spl度/锁滞环的谐波正交本振发生器[零中频收发器应用]
为了克服零中频收发器中存在的直流偏置和本LO牵引问题,提出了一种从振荡器信号产生正交本LO信号的技术,该信号为期望射频频率的n次谐波。延时锁环用于产生一组间隔为90/spl度//N的LO信号。这些可以直接应用于谐波混频器,或组合成正交LO信号的标准混频器。原型实现在0.35 /spl mu/m BiCMOS工艺中从半频压控振荡器产生用于直接转换5ghz WLAN混频器的正交LO信号。电流消耗为9 mA,模具面积为0.12 mm/sup 2/。
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