A CMOS Field Programmable Analog Array for intelligent sensory application

2013 23rd International Conference on Field programmable Logic and Applications Pub Date : 2013-10-24 DOI:10.1109/FPL.2013.6645586

Xiaoyan Cheng, Tao Yin, Qisong Wu, Yiping Jia, Haigang Yang

{"title":"A CMOS Field Programmable Analog Array for intelligent sensory application","authors":"Xiaoyan Cheng, Tao Yin, Qisong Wu, Yiping Jia, Haigang Yang","doi":"10.1109/FPL.2013.6645586","DOIUrl":null,"url":null,"abstract":"A Field-Programmable Analog Array (FPAA) architecture designed for intelligent sensory application is presented, which consists of high performance and high flexible Configurable Analog Blocks (CABs). The CAB is developed to realize both continuous-time and discrete-time circuits for achieving optimal performance in different applications. In addition to employ coarse-grained reconfigurable CAB in FPAA, a fine-grained reconfigurable amplifier in the CAB is utilized to maximize programmability and flexibility. The precision of the analog processing is enhanced by employing fat-tree interconnection network topology to minimize the number of switches used in FPAA and using correlated double sampling (CDS) techniques to suppress the offset and noise. The FPAA is designed and implemented in SMIC 0.18μm CMOS process with a 3.3 V supply voltage. An instrumental amplifier and a capacitive sensor signal readout circuit are taken as application examples. The relative precision and dynamic range of the analog processing are 97.6% and 119dB respectively.","PeriodicalId":200435,"journal":{"name":"2013 23rd International Conference on Field programmable Logic and Applications","volume":"111 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 23rd International Conference on Field programmable Logic and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FPL.2013.6645586","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 2

Abstract

A Field-Programmable Analog Array (FPAA) architecture designed for intelligent sensory application is presented, which consists of high performance and high flexible Configurable Analog Blocks (CABs). The CAB is developed to realize both continuous-time and discrete-time circuits for achieving optimal performance in different applications. In addition to employ coarse-grained reconfigurable CAB in FPAA, a fine-grained reconfigurable amplifier in the CAB is utilized to maximize programmability and flexibility. The precision of the analog processing is enhanced by employing fat-tree interconnection network topology to minimize the number of switches used in FPAA and using correlated double sampling (CDS) techniques to suppress the offset and noise. The FPAA is designed and implemented in SMIC 0.18μm CMOS process with a 3.3 V supply voltage. An instrumental amplifier and a capacitive sensor signal readout circuit are taken as application examples. The relative precision and dynamic range of the analog processing are 97.6% and 119dB respectively.

查看原文本刊更多论文

用于智能传感应用的CMOS现场可编程模拟阵列

提出了一种面向智能传感应用的现场可编程模拟阵列(FPAA)架构，该架构由高性能、高柔性的可配置模拟块(CABs)组成。为了在不同的应用中实现最优的性能，开发了连续时间和离散时间电路。在FPAA中除了采用粗粒度可重构CAB外，还在CAB中使用了细粒度可重构放大器，以最大限度地提高可编程性和灵活性。通过采用胖树互连网络拓扑结构来减少FPAA中使用的交换机数量，并使用相关双采样(CDS)技术来抑制偏移和噪声，提高了模拟处理的精度。FPAA采用中芯国际0.18μm CMOS工艺设计并实现，电源电压为3.3 V。以仪表放大器和电容式传感器信号读出电路为应用实例。模拟处理的相对精度和动态范围分别为97.6%和119dB。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

2013 23rd International Conference on Field programmable Logic and Applications

自引率

0.00%

发文量