{"title":"Simulation of Ternary CMOS Schemes for Many-Valued Logic Systems","authors":"A. Krasnyuk, A. Prozorova","doi":"10.1109/MIEL.2019.8889590","DOIUrl":null,"url":null,"abstract":"Of interest is the possibility of implementing many-valued logic systems using traditional CMOS technologies. We considered an example of the implementation of three-valued logic elements based on symmetric 3vL logic using the values {-,0,+}, {-1.0, + 1}, {1,0,1}, {1,0,1} etc. From the totality of obtained results, it can be assumed that ternary CMOS logic can be fully implemented according to norms of 28–180 nm with minimal changes for design rules.","PeriodicalId":391606,"journal":{"name":"2019 IEEE 31st International Conference on Microelectronics (MIEL)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 31st International Conference on Microelectronics (MIEL)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MIEL.2019.8889590","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Of interest is the possibility of implementing many-valued logic systems using traditional CMOS technologies. We considered an example of the implementation of three-valued logic elements based on symmetric 3vL logic using the values {-,0,+}, {-1.0, + 1}, {1,0,1}, {1,0,1} etc. From the totality of obtained results, it can be assumed that ternary CMOS logic can be fully implemented according to norms of 28–180 nm with minimal changes for design rules.