Jianjun Yu, Feng Zhao, Joseph Cali, Desheng Ma, X. Geng, F. Dai, J. Irwin, Andre Aklian
{"title":"A single-chip x-band chirp radar MMIC with stretch processing","authors":"Jianjun Yu, Feng Zhao, Joseph Cali, Desheng Ma, X. Geng, F. Dai, J. Irwin, Andre Aklian","doi":"10.1109/CICC.2012.6330617","DOIUrl":null,"url":null,"abstract":"A single-chip X-band chirp radar transceiver with direct digital synthesis (DDS) for chirp generation is presented. The radar chip, including receiver, transmitter, quadrature DDS, phase-locked loop (PLL) and analog to digital converter (ADC), has been implemented in a 0.13μm BiCMOS technology. The stretch processing technique is employed to translate the time interval between the received and the transmitted chirp signals to a single tone at the baseband output with greatly reduced bandwidth, which allows for the use of a low-cost ADC with a reduced input bandwidth of 10MHz for digitizing the received RF chirp with a bandwidth of 150MHz. A Weaver receiver with a dc-offset is employed in order to use a single ADC for detecting the received quadrature signals with image rejection. A quadrature 1GHz DDS with an inverse sinc function for zero-order hold correction is implemented to provide the chirp signals for both receiver and transmitter. A wide-tuning PLL frequency synthesizer is integrated to generate the local oscillator (LO) signals as well as the clock signal for the DDS and ADC. The implemented radar-on-chip (RoC) MMIC occupies a die area of 3.5 × 2.5mm. With a 2.2V supply voltage for analog/RF and a 1.5V supply for digital, the chip consumes 326mW in the receive mode and 333mW in the transmit mode.","PeriodicalId":130434,"journal":{"name":"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2012.6330617","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
A single-chip X-band chirp radar transceiver with direct digital synthesis (DDS) for chirp generation is presented. The radar chip, including receiver, transmitter, quadrature DDS, phase-locked loop (PLL) and analog to digital converter (ADC), has been implemented in a 0.13μm BiCMOS technology. The stretch processing technique is employed to translate the time interval between the received and the transmitted chirp signals to a single tone at the baseband output with greatly reduced bandwidth, which allows for the use of a low-cost ADC with a reduced input bandwidth of 10MHz for digitizing the received RF chirp with a bandwidth of 150MHz. A Weaver receiver with a dc-offset is employed in order to use a single ADC for detecting the received quadrature signals with image rejection. A quadrature 1GHz DDS with an inverse sinc function for zero-order hold correction is implemented to provide the chirp signals for both receiver and transmitter. A wide-tuning PLL frequency synthesizer is integrated to generate the local oscillator (LO) signals as well as the clock signal for the DDS and ADC. The implemented radar-on-chip (RoC) MMIC occupies a die area of 3.5 × 2.5mm. With a 2.2V supply voltage for analog/RF and a 1.5V supply for digital, the chip consumes 326mW in the receive mode and 333mW in the transmit mode.