{"title":"Efficient and reliable NAND flash channel for high-speed solid state drives","authors":"Joohyeong Yoon, Won Seob Jeong, Won Jeon, W. Ro","doi":"10.23919/ELINFOCOM.2018.8330553","DOIUrl":null,"url":null,"abstract":"Current generation NAND Flash Memories (NFMs) focused on optimizing data transfer time. However, depends on our analysis, the proportion of control overhead in channel efficiency has increased by up to 30.1%. By increasing the transmission rate of the control signals, it is possible to improve I/O bandwidth of NFM by 11.6%. However, this method can lead to reliability problems. Thus, we propose error detection schemes in order to compensate the reliability of the control signals. Experimental results show that the proposed scheme can improve the I/O bandwidth by about 11.1% and have a reliability for burst errors.","PeriodicalId":413646,"journal":{"name":"2018 International Conference on Electronics, Information, and Communication (ICEIC)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Conference on Electronics, Information, and Communication (ICEIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/ELINFOCOM.2018.8330553","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Current generation NAND Flash Memories (NFMs) focused on optimizing data transfer time. However, depends on our analysis, the proportion of control overhead in channel efficiency has increased by up to 30.1%. By increasing the transmission rate of the control signals, it is possible to improve I/O bandwidth of NFM by 11.6%. However, this method can lead to reliability problems. Thus, we propose error detection schemes in order to compensate the reliability of the control signals. Experimental results show that the proposed scheme can improve the I/O bandwidth by about 11.1% and have a reliability for burst errors.