{"title":"40 Gbps 180 nm CMOS Modulator Driver Using Loss Compensation Gain Cells","authors":"K. Kawahara, Y. Umeda, K. Takano","doi":"10.1109/RFIT49453.2020.9226250","DOIUrl":null,"url":null,"abstract":"Loss compensation gain cells using series-shunt peaking technique and stacked-FETs were incorporated into a modulator driver based on distributed topology to improve the bandwidth. The driver was developed in 180 nm CMOS technology. It can integrate with digital circuits on a chip. Hence the cost of optical transmitters will be considerably reduced. The driver was evaluated with electromagnetic analysis and circuit simulation, which reached an operating data rate of 40 Gbps and a peak to peak output swing of 1.8 V. It is the highest data rate compared with other works in similar CMOS technology.","PeriodicalId":283714,"journal":{"name":"2020 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIT49453.2020.9226250","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Loss compensation gain cells using series-shunt peaking technique and stacked-FETs were incorporated into a modulator driver based on distributed topology to improve the bandwidth. The driver was developed in 180 nm CMOS technology. It can integrate with digital circuits on a chip. Hence the cost of optical transmitters will be considerably reduced. The driver was evaluated with electromagnetic analysis and circuit simulation, which reached an operating data rate of 40 Gbps and a peak to peak output swing of 1.8 V. It is the highest data rate compared with other works in similar CMOS technology.