{"title":"A Wide-input-range 918MHz RF Energy Harvesting IC with Adaptive Load and Input Power Tracking Technique","authors":"Jing-Ren Yan, Hao-Yi Kuo, Y. Liao","doi":"10.1109/ESSCIRC55480.2022.9911490","DOIUrl":null,"url":null,"abstract":"This paper presents a high-efficiency radio frequency (RF) power harvesting IC with an extended input range. The proposed system comprises a reconfigurable rectifier, maximum power point tracking unit, load modulation circuit, and low-dropout regulator. The reconfigurable rectifier extends the high-efficiency range of the RF input power through stage number control and load modulation according to input power and load requirements. The design is fabricated using $0.18-\\mu \\mathrm{m}$ CMOS technology, and the chip area is $1.15 \\times 0.57\\text{mm}^{2}$. The proposed system can achieve an RF-DC power conversion efficiency greater than 20% in a 16.5-dB input power range with a peak value of 45%, and sensitivity of -16 dBm for a 1-V output voltage.","PeriodicalId":168466,"journal":{"name":"ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)","volume":"92 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC55480.2022.9911490","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents a high-efficiency radio frequency (RF) power harvesting IC with an extended input range. The proposed system comprises a reconfigurable rectifier, maximum power point tracking unit, load modulation circuit, and low-dropout regulator. The reconfigurable rectifier extends the high-efficiency range of the RF input power through stage number control and load modulation according to input power and load requirements. The design is fabricated using $0.18-\mu \mathrm{m}$ CMOS technology, and the chip area is $1.15 \times 0.57\text{mm}^{2}$. The proposed system can achieve an RF-DC power conversion efficiency greater than 20% in a 16.5-dB input power range with a peak value of 45%, and sensitivity of -16 dBm for a 1-V output voltage.