{"title":"On-the-Fly Donut Formation in Compiled Memory","authors":"Darvinder Singh, Isha Garg, Vineet Sachan, Prasanna Nalawar","doi":"10.1109/VLSID.2015.32","DOIUrl":null,"url":null,"abstract":"Timing data collection through memory compiler characterization is an integral part of memory compiler development. Simulations are run on an exhaustive instances list to cover the whole compiler range. Full characterization taxes resources immensely, both in terms of time and disk space. This paper focusses on on-the-fly donut creation methodology for the target memory compiler instance. In donut creation flow, nontiming critical bit cells are removed from the bit cell array while timing-critical bit cells are preserved. For an 80kB memory instance with close to 5 million transistors, RC extraction was not feasible using normal simulation machines. Comprehensive analysis, which earlier was impractical due to the difficulty of extracting the biggest (80kB) instance, was completed with the help of donut generation. Using on-the-fly donut formation flow, RC extracted net list was reduced by 75% and accuracy of timing simulations increased within 2%.","PeriodicalId":123635,"journal":{"name":"2015 28th International Conference on VLSI Design","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-02-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 28th International Conference on VLSI Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSID.2015.32","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Timing data collection through memory compiler characterization is an integral part of memory compiler development. Simulations are run on an exhaustive instances list to cover the whole compiler range. Full characterization taxes resources immensely, both in terms of time and disk space. This paper focusses on on-the-fly donut creation methodology for the target memory compiler instance. In donut creation flow, nontiming critical bit cells are removed from the bit cell array while timing-critical bit cells are preserved. For an 80kB memory instance with close to 5 million transistors, RC extraction was not feasible using normal simulation machines. Comprehensive analysis, which earlier was impractical due to the difficulty of extracting the biggest (80kB) instance, was completed with the help of donut generation. Using on-the-fly donut formation flow, RC extracted net list was reduced by 75% and accuracy of timing simulations increased within 2%.