Proposal of Vertical-channel Fin-SiC MOSFET toward Future Device Scaling

H. Shimizu, Takeru Suto, H. Miki, Y. Mori, D. Hisamoto, A. Shima, K. Kinoshita, T. Murata, T. Oda
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Abstract

We propose a new SiC trench MOSFET suitable for achieving both low loss and high reliability. This structure, called a VC Fin-SiC, is characterized by a fin-shaped trench, and by adopting a wide channel formed on the sidewall of the fin and a narrow JFET with high dopant concentration, it achieves both low on-resistance and high reliability. In this work, these design concepts are verified through simulation and actual device fabrication. Because the VC Fin-SiC has channels directly above the JFET structure, the performance can be easily improved by scaling the fin-pitch and channel length, and it will be one of the most promising structures in the future.
垂直通道Fin-SiC MOSFET面向未来器件缩放的建议
我们提出了一种适合实现低损耗和高可靠性的新型碳化硅沟槽MOSFET。这种结构被称为VC fin- sic,其特点是鳍状沟槽,并采用在翅片侧壁形成的宽通道和高掺杂浓度的窄JFET,实现了低导通电阻和高可靠性。在这项工作中,这些设计概念通过仿真和实际器件制造得到验证。由于VC Fin-SiC在JFET结构的正上方有通道,因此通过缩放翅片间距和通道长度可以很容易地提高性能,这将是未来最有前途的结构之一。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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