{"title":"Ultra-low on-resistance 60-100 V superjunction UMOSFETs fabricated by multiple ion-implantation","authors":"H. Ninomiya, Y. Miura, K. Kobayashi","doi":"10.1109/WCT.2004.239900","DOIUrl":null,"url":null,"abstract":"We propose new low-voltage UMOSFETs with superjunction (SJ) structures to achieve ultra-low on-resistance. The present SJ structure has been formed by multiple boron ion implantations with varied energies up to 2 MeV. This technique enabled us to obtain p-columns with flat sidewalls, which minimize the interference to the drift conduction. The SJ diodes have clearly indicated the breakdown voltage enhancement, as expected, from the SJ characteristics. Drastic on-resistance reduction was demonstrated for the SJ-UMOSFETs with a breakdown voltage of 78 V.","PeriodicalId":303825,"journal":{"name":"2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WCT.2004.239900","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19
Abstract
We propose new low-voltage UMOSFETs with superjunction (SJ) structures to achieve ultra-low on-resistance. The present SJ structure has been formed by multiple boron ion implantations with varied energies up to 2 MeV. This technique enabled us to obtain p-columns with flat sidewalls, which minimize the interference to the drift conduction. The SJ diodes have clearly indicated the breakdown voltage enhancement, as expected, from the SJ characteristics. Drastic on-resistance reduction was demonstrated for the SJ-UMOSFETs with a breakdown voltage of 78 V.