An approach to diagnose logical faults in partially observable sequential circuits

K. Yamazaki, Teruhiko Yamada
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引用次数: 2

Abstract

We propose an approach for locating logical faults in sequential circuits under the condition that all the internal nets are not observable. In this approach, candidates for the error sources are first deduced by an error propagation traceback starting from the failing primary outputs. Then, with the aid of probing, the possible error sources are found. Simulation results for ISCAS'89 benchmark circuits show that a reasonable diagnostic resolution can be achieved by our approach if more than 50% of the internal nets are observable.
部分可观察顺序电路中逻辑故障的诊断方法
提出了一种在内部网络不可观测的情况下,对顺序电路中的逻辑故障进行定位的方法。在这种方法中,首先通过从失败的主输出开始的错误传播回溯推导出候选错误源。然后,借助探测,找出可能的误差源。对ISCAS’89基准电路的仿真结果表明,当50%以上的内部网络可被观察到时,我们的方法可以达到合理的诊断分辨率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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