Equivalence checking a 256 MB SDRAM

Abstract

This paper outlines how symbolic simulation was used to verify both data and sequence integrity in a 256 MB SDRAM. The initial step is to examine the underlying equivalence-checking engine and then explain how it is applied to SDRAM verification. SDRAM verification is interesting in that it captures both memory and sequence verification. The data integrity verification is valid for any type of memory structure and the sequence integrity can be extended to many types of sequenced machines.