Active Voltage Balancing Embedded Digital Gate Driver for Series-Connected 10 kV SiC MOSFETs

Abstract

This paper focuses on series connection of 10 kV SiC MOSFETs which enables higher operation voltage of devices for medium voltage application. To minimize switching losses, active voltage balancing for series-connected 10 kV SiC MOSFETs is implemented instead of passive snubbers. For this purpose, a new gate driver is designed for active voltage balancing of two series-connected 10 kV SiC MOSFETs with the following features: 1) miniaturized 10 kV drain-source voltage measurement unit and its interconnection to gate-driver; 2) Tunable gate signal delay time adjustment unit with 0.25 ns resolution; 3) Rogowski current sensing unit for fault current detection. Based on the developed gate driver, the FPGA-based closed-loop gate signal timing control for active voltage balancing and fault protection of series-connected 10 kV SiC MOSFETs are designed in this paper. The proposed gate driver and active voltage balancing method are validated in a phase-leg test achieving 16 kV total blocking voltage.