A Modified ecimation ilter esign for Oversampled Sigma elta A/ Converters

Abstract

The paper presents a novel lower power polyphase transformable stage nonrecursive comb (PTSNC) filter architecture considering the area and power consumption, which is very suitable for high-order oversampled sigma delta A/D converters. The proposed decimation filter has 1/3 less hardware and power compared to conventional non-recursive decimation filters when the filter was implemented using 0.6-mum CMOS standard when the circuit work clock was 100MHz